- HELP
EVDAK is the name of the DMB32 LEVEL 3 Diagnostic. It provides
go/nogo testing of the basic functionality of the DMB32. This
diagnostic will also exercise the DMB32 by pushing it to its
performance limits.
Since it is a go/nogo test no attempt will be made to identify
failing components at any level.
If an error is reported and more information is required, note
the test number and the error number, then use the on line help to get
more information. To do this type
DS> HELP EVDAK TESTS TEST_2 ERROR
DS> HELP EVDAK TESTS TEST_2 DEBUG
For test 2, for other tests specify TEST_N where N is the test number
- REQUIREMENTS
The following requirements must be met (unless marked as optional)
before this diagnostic is executed.
- HARDWARE
EVDAK runs on VAX systems with a VAXBI interface, suitable load
media, and one or more DMB32(s) on the VAXBI.
- SOFTWARE
The VAX Diagnostic Supervisor is the only piece of software that
EVDAK needs to run with aside from the user help file. This
diagnostic will not run under the VAX VMS operating system.
- ATTACH
The following information must be included in the Hardware
Parameter Table, Ptable:
o Device Type - DMB32.
o Device Link - VAXBI interface.
o Device Name - TXa where a is a character for the unit under
test.
o VAXBI Node number - VAXBI Node number of unit under test.
This information will have to be entered by the user, for each
unit under test. An example of this is using the attach command:
DS> ATTACH DMB32 HUB TXa 3
^ ^ ^ ^ ^
| | | | |
| | | | +--------- VAXBI Node number HEX (range 0 - F)
| | | +----------- Generic Name (Range A - Z)
| | +---------------- Linked to VAXBI if this is the main
| | system bus, else link to the NBIB
| +--------------------- Device to be attached
+---------------------------- ATTACH command
NOTE: In cases where the VAXBI is itself attached to another bus, the
VAXBI adapter must be attached first, for example on a VAX8800 the
attach would be :-
DS> ATTACH NBIA HUB NBIAn n ! Where n is 0 or 1
DS> ATTACH NBIB NBIAn NBIBm m p ! Where m is 0 or 1 and p is 0 to F
DS> ATTACH DMB32 NBIBn TXa 3
In this example n, m and p are dependent on machine configuration. For
further information refer to the appropriate manual for the specific
machine.
- SECTIONS
The tests are in two sections, these are
o Default - All tests except test number 33
o Manual - Test 33
These sections can be specified by using the /SECTIONS qualifier
when running under the VAX Diagnostic Supervisor.
For example:
Default Section - DS> START or
DS> START/SECTION=DEFAULT
Manual Section - DS> START/SECTION=MANUAL
- DEVICE
The DMB32 is a synchronous/asynchronous multiplexer that provides
an interface for eight asynchronous serial data communications
channels, one synchronous line, and one line printer to any VAXBI
processor.
EVDAK utilises the following features to make it easy to use:
o It needs no operating system to execute.
o Utilises a common user interface known by most users of VAX
Diagnostics.
o Simple error messages complying with a "go/nogo" test
strategy.
o Each test has several unique error numbers to identify
failing test areas for second-level trouble-shooting in the
field.
o A minimum amount of user familiarity with the device.
1. VAXBI Node number.
2. Which lines need to be checked out.
3. What type of loopback is to be utilised.
o Defaults for line and loop type if the user wishes to leave
it up to the diagnostic to decide.
o Online help facilities to aid the user with information not
known.
- QUICK
Not implemented
- EVENT
For use under automated test systems which run with the OPER flag
clear an alternative method of controlling the diagnostic is provided.
This uses the User EVENT FLAGS and if used will inhibit the asking of
questions. Since this is for automated systems no checking of input
will be performed, the flags used are :-
EVENT FLAG 1 SET to inhibit questions
EVENT FLAG 2 SET for Staggered loop
EVENT FLAG 3 SET for external loopback on all ASYNC lines
EVENT FLAG 4 SET for external loopback on the SYNC port
EVENT FLAG 5 SET for Printer testing
These event flags will not be used unless the OPER Flag is CLEAR.
These flags are in the order of precedence, i.e. if the staggered
flag is set the others will be ignored.
A further event flag is used for manufacturing and repair
centres, this causes the diagnostic to ask about the use of a special
manufacturing loopback. This does not require the OPER flag to be
cleared.
EVENT FLAG 23 SET to modify questions. If this flag is set the
first question will be
Is a staggered loopback fitted ? [(NO), YES, NO]
If the answer is YES, no more questions will be
asked
- OPTIONS
The following questions will be asked on start_up
The sequence of questions will be as follows :
Test the ASYNC port ? [(YES), YES, NO]
If yes then
Loop back type ? [(INTERNAL), INTERNAL, EXTERNAL, MODEM]
If not internal ( i.e. EXTERNAL or MODEM )
Lines to be tested ? [(ALL), REVERSE, EVEN, ODD, 0,1,2,...,6,7]
The user can select any combination of lines, or
all of them. A number may be entered 2 or more times,
and numbers may be entered in any order. The diagnostic
will test the lines in the order entered. The maximum
number of numbers that may be entered is 8.
If modem testing is selected
Line speed ? [(300), 50, 75, 110, 134.5, 150, 300, 600, 1200,
1800, 2000, 2400, 4800, 7200, 9600, 19200, 38400]
Bits per byte ? [(7), 5, 6, 7, 8]
Parity ? [(EVEN), NONE, ODD, EVEN]
The user will now be asked about the Sync port
Test the sync port ? [(YES), YES, NO]
If yes then
Loop back type ? [(INTERNAL), INTERNAL, EXTERNAL, MODEM]
The user will now be asked about the Printer port.
Test the printer port ? [(YES), YES, NO]
If yes then
Line printer fitted ? [(NO), YES, NO]
If yes then the user is asked about the printer
Printer Page width ? [(132), 0-132(D)]
Printer Page length ? [(66), 0-66(D)]
Then about the type of type patterns to use, this may
be defaulted to a shifting alpha numeric string.
Do you want default patterns ? [(YES), YES, NO]
If NO
Pattern type ? [(DIAG), DIAG, HORIZ, VERT, CHAR]
Repeat pattern ? times [(1), CONT, 2, 3, 4, 5, 6, 7, 8, 9]
Enter test string [ Default is all characters ]
NOTE 1 In the case of the SYNC port being selected for loopback
testing, the diagnostic will automatically determine the type of
loopback, i.e. decide between the two 50 way loopbacks or if an
adapter cable is fitted determine which type. Having done this the
testing will be modified appropriately.
NOTE 2 In the case of single character (CHAR) pattern being selected
the first character of the string will be used. The default for test
string is all printable characters.
- TESTS
This diagnostic contains the following tests.
- Test_1
TITLE : Device Address Test ALL
Verifies that the UUT will respond to the BI when accessed. All
registers are accessed.
- STEPS
1. Probe the BICSR, if it does not answer then error and exit
2. Deposit 980 (hex) into BICSR
3. Set loop counter to 0
4. Calculate the address of the register
5. Probe the register, if it does not answer then error and exit
6. Increment counter, if valid go to 4
7. Check no interrupts occurred
- ERRORS
ERROR 1: BCICSR Failed to respond to it's address
ERROR 2: Device failed to respond to its address
ERROR 3: Device Generated an unexpected interrupt
ERROR 4: BIIC Error interrupt generated during test
- DEBUG
1. Check that DMB32 has correct node id plug fitted
2. Check that diagnostic was attached correctly
- Test_2
TITLE : BIIC Register test ALL
Verify that all BIIC registers can be read and hold valid data
( including the device type ).
- STEPS
1. Read the Device type register and check that device is a DMB32
if not then error and abort the program
2. Check for errors in BUSERR register, if found then error
3. Read BICSR, check that node id matches p-table
4. Set interrupt enables
5. Check for errors in BUSERR register, if found then error
6. Read the interrupt control register and set up interrupts
7. Check for errors in BUSERR register, if found then error
8. Check spurious interrupts
- ERRORS
ERROR 1: Device type field does not have DMB32 code in it
ERROR 2: Errors in BUSERR register after access to DEVTYPE register
ERROR 3: NODE.ID field does not agree with PTABLE node id
ERROR 4: Errors in BUSERR register after access to BICSR register
ERROR 5: Errors in BUSERR register after access to INTCTRL register
ERROR 6: Unexpected interrupt occurred during test
ERROR 7: BIIC Error interrupt occurred during test
- DEBUG
1. If device is a DMB32, check node id
2. If node id is wrong, check node id plug
3. Swap module out
- Test_3
TITLE : Maintenance mode test ALL
Verify that the maintenance modes function correctly.
- STEPS
1. Set DMB32 to Maintenance mode 2 and set up start and end address's
2. Use $DS_PROBE to verify address answers
3. Write a pattern of 5555's to the location
4. Read back data and verify it
5. Write a pattern of AAAA's to the location
6. Read back data and verify it
7. Set pointer to next location, if valid 2
8. Set DMB32 to normal mode
9. Re initialise DMB32 with a start selftest
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Adapter window address did not respond
ERROR 3: Read / write data error to adapter window, data of 5555 hex
ERROR 4: Read / write data error to adapter window, data of AAAA hex
ERROR 5: BIIC Error occurred during test
- DEBUG
1. Error from channel call should not happen, check rev of VDS
2. Swap out module, this is a fatal error
3. Swap out module, this is a fatal error
4. Swap out module, this error is fatal
5. Swap out module, this is a fatal error
- Test_4
TITLE : Selftest ALL
Run onboard selftest and verify that it passes. Run selftest and
force a fail, verify it fails correctly. Run selftest with selftest
skip set, verify that the selftest has been skipped. Reset board and
verify that all registers are in correct state.
- STEPS
1. Call Channel service to run selftest from BIIC
2. Set up BIIC in case selftest hung
3. Check BIIC broke bit
4. Check diag fail bit is clear
5. Check for correct data in GPR
6. Check for no codes in FIFO
7. Set Master reset
8. Check Master reset clears within correct time
9. Check BIIC broke bit
10. Check diag fail bit is clear
11. Check for correct data in GPR
12. Check for no codes in FIFO
13. Set master reset and force fail bit
14. Check Master reset clears within correct time
15. Check BIIC broke bit
16. Check diag fail bit is set
17. Check for correct data in GPR
18. Check for correct codes in FIFO
19. Set master reset and skip selftest bit
20. Check Master reset clears within correct time
21. Check BIIC broke bit
22. Check diag fail bit is clear
23. Check for correct data in GPR
24. Check for no codes in FIFO
25. Verify all DMB32 registers in correct state after reset
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error from $DS_CHANNEL used to run selftest, selftest failed
ERROR 3: BIIC Selftest failed
ERROR 4: ROM Based Selftest failed
ERROR 5: ROM Based selftest failed
ERROR 6: Selftest passed but left data in GPR0, should not have
ERROR 7: Selftest passed but left data in RX FIFO
ERROR 8: Error using VDS $SETIMR call, should never happen
ERROR 9: Selftest started from MAINT timed out
ERROR 10: BIIC Selftest failed
ERROR 11: Selftest started from MAINT failed
ERROR 12: Selftest started from MAINT failed
ERROR 13: Selftest passed but left data in GPR0
ERROR 14: Selftest passed but left data in RX FIFO
ERROR 15: Error from call to VDS $SETIMR, should never occur
ERROR 16: Selftest timed out on a forced fail
ERROR 17: BIIC Failed selftest, but was not started
ERROR 18: Selftest failed, Broke set but BIIC selftest was not started
ERROR 19: Selftest did not fail on a forced failure
ERROR 20: Data in GPR0 is not forced ail code, after forced fail set
ERROR 21: Data in RX FIFO is not forced ail code, after forced fail
set
ERROR 22: Error from call to VDS SETIMR routine, should never occur
ERROR 23: Selftest timed out on skip selftest
ERROR 24: BIIC Failed selftest on skip selftest
ERROR 25: Selftest failed on skip selftest
ERROR 26: Selftest failed on skip selftest
ERROR 27: Data in GPR0 after skip selftest
ERROR 28: Data in RX FIFO after skip selftest
ERROR 29: Interrupt occurred during the test
ERROR 30: BIIC Error occurred during test
- DEBUG
1. Errors from VDS service SETIMR should never occur, check rev of
VDS
2. If error from BIIC swap out module
3. If error from selftest swap module
NOTE:
The GPR used in this test is a Selftest Test Summary Register.
- Test_5
TITLE : Configuration Test ALL
Check the device configuration against the users input.
- STEPS
1. Start selftest to setup the configuration registers
2. Read device configuration
3. If ASYNC testing then verify ASYNC lines are configured in
4. If SYNC testing then verify SYNC line is configured in
5. If PRINTER testing then verify Printer port is configured in
6. If external testing on any port then check that cable is OK
7. If Staggered testing then check staggered loopback is fitted
8. If Staggered testing and special M/F loop detected then build
printer patterns
8. If normal M/F loop detected then error
9. If SYNC testing is not internal then check the SYNC lines in config
10. If Sync testing is in external then determine the loopback/standard
and print message about it
11. If Staggered test then check sync port has a staggered loop fitted
12. If Printer testing to a printer, then check printer lines in config
13. Verify no BIIC error interrupts occurred
INFORMATION MESSAGES
INFO 1: Special manufacturing loop detected, if not fitted
you have a problem
INFO 2: Message about loopback/standard fitted to sync port
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error from call to VDS SETIMR, should never occur
ERROR 3: Selftest timed out
ERROR 4: Selftest failed
ERROR 5: Cable key not set, cables not connected properly
ERROR 6: ASYNC lines not configured in by firmware
ERROR 7: SYNC port not configured in by firmware
ERROR 8: Printer port not configured in by firmware
ERROR 9: Staggered loopback not fitted, but staggered testing asked
for
ERROR 10: Manufacturing burn in loopback detected
ERROR 11: SYNC Port not configured for external testing, no adapter
cable found
ERROR 12: SYNC port adapter cable not supported
ERROR 13: X.21 cable detected, not supported for external testing
ERROR 14: No staggered loopback on SYNC port, staggered test asked for
ERROR 15: PRINTER Port not configured for external testing, no
printer found
ERROR 16: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Should not occur, check rev of VDS
3. Run test 4 for analysis of selftest errors
4. Run test 4 for analysis of selftest errors
5. Check ribbon cables
6. Run test 4 for analysis of selftest errors
7. Must fit an adapter cable to test sync port
8. Must have a printer fitted to test printer port
9. Check loopback and cables, if fitted properly run test 4
10. Check loopback and cables, if fitted properly run test 4
11. Check ribbon cables and adapter cable
12. Check adapter cable is fitted, and supported
13. Use special adapter and loopback
14. Check loopback and cables, if fitted properly run test 4
15. Check ribbon cables, printer cable and printer
16. FATAL Error, swap module
- Test_6
TITLE : TX Enable/Action/TX FIFO ASYNC
Verifies that if a data word is written without the transmit data
valid bit set, no transmit action is generated, and when it is set,
transmit action is generated. Verifies that each line can make an
entry into the transmit completion FIFO and that the transmit
completion FIFO works.
- STEPS
1. Set master reset and selftest skip, wait for master reset to clear
2. Verify that transmit Action has been reset
3. Set TX enable on all lines and verify that it does set
4. Put all lines into internal loopback mode
5. Select line 0
6. Clear transmit enable and verify it clears on current line only
8. Select line under test and send a character by preempt
9. Wait for character to be sent
10. Verify that the transmitter action is set
11. Verify that DMA error did not set
12. Verify the correct line transmitted the character
13. Clear transmit enable
14. Select next line, if valid 6
15. Select line 0
16. Write a character into the preempt transmit register
17. Verify character is not transmitted until Preempt go bit
is set
18. Clear the TX FIFO entry
19. Increment line number and character if valid 17
20. Transmit enough characters to fill TX FIFO
21. Read transmit completion FIFO
22. Verify correct character
23. Verify correct line
24. Read transmit completion FIFO
25. Verify the same as in 20
26. Write to transmit completion FIFO
27. If more to be read 20
28. Verify transmit completion FIFO is empty
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: TX Action set after initialisation
ERROR 4: TX Enable set after clearing it
ERROR 5: TX Enable set on line under test after clearing it
ERROR 6: TX Enable clear after clearing it on a different line
ERROR 7: TX Action not set after sending a character
ERROR 8: DMA Error in FIFO entry, no DMA performed
ERROR 9: FIFO Entry from wrong line
ERROR 10: PREEMPT character sent with PREEMPT go bit clear
ERROR 11: PREEMPT Character not sent after go bit set
ERROR 12: Not enough entries in the TX Action FIFO
ERROR 13: TX FIFO entry not due to PREEMPT complete
ERROR 14: FIFO Entry due to DMA Error or FIFO DONE condition
ERROR 15: Incorrect line number in FIFO entry
ERROR 16: FIFO Not empty after taking all valid entries out
ERROR 17: Unexpected interrupt occurred during test
ERROR 18: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. Check that selftest lamp flashes, use test 4 to check selftest
4. All other errors are due to module failure, swap module
- Test_7
TITLE : RX FIFO ASYNC
This test fills the RX FIFO with unique data, reads it back
and verifies the data integrity.
- STEPS
1. Set all lines to internal loopback with transmit enabled
2. Select line 0
3. Write a character into the transmit preempt register and
wait long enough for it to be sent and received
4. Increment line number and character, if valid 3
5. Read receive FIFO
6. Verify correct character with no errors
7. Verify correct line
8. Read receive FIFO
9. Verify the same as in 5
10. Write to receive FIFO
11. If more to be read 5
12. Verify receive FIFO is empty
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: No Valid character in the RX FIFO after a transmit in
internal
ERROR 4: Character had a parity, framing or overrun error
ERROR 5: Character mis match, not what was sent
ERROR 6: RX FIFO Entry from wrong line
ERROR 7: RX FIFO Entry changed after two reads
ERROR 8: Too many entries in the RX FIFO
ERROR 9: Un expected interrupt generated during test
ERROR 10: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. This test runs in internal loop, so all other errors are due to
module failure, swap module
4. For error 5, the Expected data is composed of two bytes, the low
byte is the data and the high byte are the error bits, taken from
the SBUF register, refer to the DMB32 Users guide for details.
- Test_8
TITLE : Interrupts ASYNC
Verify the Async port's ability to generate Async interrupts, and the RX
holdoff timers function.
- STEPS
1. Set all lines to internal loopback
2. Disable Async interrupts
3. Select line 0
4. Transmit a character
5. Verify that it was received
6. Verify no interrupts occurred
7. Select next line, if valid, go to 4
8. Select line 0
9. Enable transmit interrupts with timer to instant
10. Transmit a character
11. Verify that it was received
12. Verify only transmit interrupt occurred
13. Select next line, if valid, go to 10
14. Select line 0
15. Enable transmit and receive interrupts with timer to instant
16. Transmit a character
17. Verify that it was received
18. Verify both transmit and receive interrupts occurred
within correct time
19. Select next line, if valid, go to 15
20. Select line 0
21. Enable receive interrupts with timer to instant
22. Transmit a character
23. Verify that it was received
24. Verify only a receive interrupt occurred
within the correct time
26. Set Timer to infinite
27. Transmit enough characters to be 1 under the 3/4 alarm
28. Verify no interrupts occurred
29. Transmit a character
30. Verify only a receive interrupt occurred
31. Purge FIFO
32. Select next line, if valid go to 26
33. Set Timer for 100 msecs
34. Transmit a character
35. Wait for 10 msecs
36. Verify no interrupts occurred
37. Wait for 150 msecs
38. Verify only a receive interrupt occurred
39. Select next line, if valid go to 32
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Character was not received
ERROR 4: Interrupt occurred with interrupts disabled
ERROR 5: Character was not received
ERROR 6: ASYNC TX Interrupt did not occur
ERROR 7: Interrupt was not an ASYNC TX one
ERROR 8: Another interrupt occurred as well as the TX one
ERROR 9: ASYNC TX and RX Interrupts did not occur
ERROR 10: Interrupt was not an RX ASYNC one
ERROR 11: Another interrupt occurred as well as the RX one
ERROR 12: ASYNC RX Interrupt did not occur
ERROR 13: Interrupt was not an ASYNC RX one
ERROR 14: Another interrupt occurred as well as the RX one
ERROR 15: Interrupt occurred before 3/4 alarm was reached
ERROR 16: Interrupt did not occur after 3/4 alarm was reached
ERROR 17: Interrupt was not an ASYNC RX one
ERROR 18: Another interrupt occurred as well as the RX one
ERROR 19: Timer did not holdoff the interrupt
ERROR 20: Interrupt did not occur after timer delay
ERROR 21: Interrupt was not an ASYNC RX one
ERROR 22: Another interrupt occurred as well as the RX one
ERROR 23: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. This test runs in internal loop, so all other errors are due to
module failure, swap module
- Test_9
TITLE : DMA start and abort ASYNC
Verify that the Async port can start and abort a DMA transfer.
- STEPS
1. Set each line to internal loopback
2. Select line 0
3. Set up line and enable interrupts
4. Start a DMA transmit on selected line
5. Abort transmit after 10 msecs
6. Verify that DMA aborted properly
7. Verify that at least 1 character was received correctly
8. Increment line number, if valid 3
9. Select line 0
10. Start a DMA transmit on selected line
11. Wait for completion, with a time out
12. Verify that it completes and interrupts properly
13. Verify received data is correct
14. Increment line number, if valid 10
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: DMA Abort did not cause an interrupt
ERROR 4: Too many interrupts generated
ERROR 5: DMA Error bit set in TX FIFO entry
ERROR 6: Received character was not the same as the transmitted one
ERROR 7: Error from VDS call to SETIMR, this should not occur
ERROR 8: No Interrupt so DMA did not complete
ERROR 9: Too many interrupts occurred
ERROR 10: TX FIFO Entry did not have TX Action set
ERROR 11: TX FIFO Entry had the DMA error bit set
ERROR 12: Received character not the same as the transmitted one
ERROR 13: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. This test runs in internal loop, so all other errors are due to
module failure, swap module
4. For error 7, check rev of VDS
5. For error 6 and 12, the Expected data is composed of two bytes,
the low byte is the data and the high byte are the error bits,
taken from the SBUF register, refer to the DMB32 Users guide
for details.
- Test_10
TITLE : Maintenance mode test ASYNC
This test verifies that the Maintenance modes are working correctly.
- STEPS
1. Set all lines to normal mode
2. Select line 0
3. Set line to internal loop
4. Verify only selected line is in internal loopback mode
5. Transmit a character
6. Verify correct line received it
7. Verify character is correct and no errors have occurred
8. Set current line to normal
9. Increment line number, if valid 3
10. If external testing is not selected print info message and end test
11. Select line 0
12. Transmit a character
13. Verify correct line received it
14. Verify character is correct and no errors have occurred
15. Increment line number, if valid 12
16. Select line 0
17. If valid then goto 10
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Changing MAINT.ASYNC on 1 line affected another line
ERROR 4: MAINT.ASYNC changed state after it was set up
ERROR 5: Character was not received in internal loop
ERROR 6: Character was received but had errors on it
ERROR 7: Received Character was from wrong line
ERROR 8: Data compare error in internal loop
ERROR 9: Character was not received in external loop
ERROR 10: Character was received in external loop with errors
ERROR 11: Character was received in external loop from the wrong line
ERROR 12: Character was received in external loop from the wrong line
ERROR 13: Data compare error in external loop
ERROR 14: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. Errors 3 to 8 are internal loopback so swap out module
4. Errors 9 to 13 are external loopback so check cables and loopbacks
5. For error 8 and 13, the Expected data is composed of two bytes,
the low byte is the data and the high byte are the error bits,
taken from the SBUF register, refer to the DMB32 Users guide for
details.
- Test_11
TITLE : Parameters ASYNC
This goes through all speeds and parameters on a per line basis and
verifies that they work, using whatever loopback type is selected.
Note this does not do split speed testing.
- STEPS
1. Set pointer to start of parameter table
2. Select line 0
3. Get parameters from table
4. Set up line and set to internal if no loopbacks
5. Set up LPR from parameter table
6. Set up DMA pointers
7. Inc line number if valid 3
8. Start all DMA's and wait for 250 msecs
9. Abort DMA's and wait for the abort to work, plus any characters
still in transit to finish
10. If first_speed flag is set in table then record each lines
character count
11. If speed flag is set compare each lines character count with last
times and record the count for next iteration
12. Perform the data compare between characters send and received
and check each character for error flags
13. Inc param pointer if valid 2
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Did not receive any characters
ERROR 4: Speed error
ERROR 5: Received character compare error or errors on character
ERROR 6: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. This test runs in loopback mode selected so if you selected
loopback re run in internal.
4. In internal swap out module
5. In external check the cables and loopbacks
6. NOTE if you have a modem fitted and have selected modem the test
will run in internal loopback.
If you selected LOOPBACK in the loopback type question with a modem
set to loopback the test will fail as it changes speeds.
7. For error 5, the Expected data is composed of two bytes, the low
byte is the data and the high byte are the error bits, taken from
the SBUF register, refer to the DMB32 Users guide for details.
- Test_12
TITLE : Split Speed Test ASYNC
This test verifies that split speed operations work correctly. This
test works in staggered loopback only.
- STEPS
1. Check for Staggered loop, if not exit
2. Set speed1 and speed2 to 1 and line number to 0
3. Select line
4. Set up line to transmit speed1 and receive speed2
5. Set up DMA pointers
6. Set up staggered line to transmit speed2 and receive speed1
7. Set up DMA pointers
8. Inc line number if valid 3 ( lines 0,1,4 and 5 only )
9. Start all DMA's
10. Wait for 250 msecs
11. Count chars sent
12. Perform data compare and received character check on all lines
13. Inc speed1 if less than 12 goto 3
14. Set speed1 to zero and inc speed2 if less than 12 goto 3
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Did not receive any characters
ERROR 4: Received character compare error or errors on character
ERROR 5: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For other errors if the module has passed previous tests then
swap out module
4. For error 4, the Expected data is composed of two bytes, the low
byte is the data and the high byte are the error bits, taken from
the SBUF register, refer to the DMB32 Users guide for details.
- Test_13
TITLE : Error Detection ASYNC
This test verifies that each line can detect parity
errors. This test works in staggered loopback only.
- STEPS
1. Check for Staggered loop, if not exit
2. Set pointer to start of parameter table
3. Select line 0
4. Get parameters from table
5. Set up line for transmit
6. Set up adjacent line for receive
7. INC line number if valid 4
9. Send 1 character from each line
10. Delay for it to go around the loop
11. Receive then from input buffer (interrupt routine does
receive and puts characters in a buffer)
12. Compare error flags against table error mask
13. Inc param pointer if valid 3
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Did not receive any characters
ERROR 4: Did not get expected error on the character
ERROR 5: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For other errors if the module has passed previous tests then
swap out module
4. For error 4, the data reported in the error message is composed
of two bytes, the low byte is the data and the high byte are
the error bits, taken from the SBUF register, refer to the
DMB32 Users guide for details.
- Test_14
TITLE : XON/XOFF ASYNC
This test verifies the XON and XOFF generation and detection.
- STEPS
AUTO FLOW OFF
1. Disable receive interrupts enable transmit interrupts
2. Select line 0
3. Set line for internal loop
4. Clear oauto and iauto
5. Set up DMA pointers
6. Select next line, if valid 3
7. Select line 0
8. Start DMA transmit
9. Select next line, if valid 8 else wait for TX completion
10. Get received characters out of FIFO
11. Check for Xoff's ( should not be any )
12. Select next line, if valid goto 3
AUTO FLOW ON
13. Select line 0
14. Set line for internal loop
15. Set oauto and iauto
16. Set up DMA pointers
17. Select next line, if valid 14
18. Select line 0
19. Start DMA transmit
20. Select next line, if valid 19
21. Check that TX's have not completed
22. Enable RX interrupts and wait for TX'x to complete
23. Check that they did complete
24. Check for Xoff's and Xon's ( should be some )
25. Select next line, if valid goto 14
SNDXOF TEST
26. Select line 0
27. Set line for internal loop
28. Clear oauto and iauto
29. Set SNDOFF
30. Verify no Xoff's where received
31. Transmit a character
32. Verify one character was received
33. Verify an Xoff was received
34. Clear SNDOFF
35. Select next line, if valid goto 27
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: XOFF Character in RX FIFO, with auto flow disabled
ERROR 4: Auto flow did not hold off transmitter
ERROR 5: Transmitter has not completed after purging the RX fifo,
did not XON
ERROR 6: Did not find any XON / XOFF characters in Receive buffer
ERROR 7: XOFF forced by setting SNDOFF, should have waited for an RX
character
ERROR 8: Did not receive the character
ERROR 9: Received the wrong character, should have been the one sent
ERROR 10: Did not get an extra character, expected an XOFF
ERROR 11: Got an extra character but it was not an XOFF
ERROR 12: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For other errors since the test runs in internal loop
swap out module
- Test_15
TITLE : Modem Signals ASYNC
This test verifies that the modem signals work for all Async lines.
- STEPS
1. Select line 0
2. Disable interrupts
3. Clear Report modem and Use CTS bits
4. Clear DTR and RTS
5. Check state of CTS DCD RI and DSR on all lines
6. Set DTR
7. Check state of CTS DCD RI and DSR on lines
8. Clear DTR and set RTS
9. Check state of CTS DCD RI and DSR on lines
10. Set DTR and RTS
11. Check state of CTS DCD RI and DSR on lines
12. Set report modem bit and enable interrupts
13. Clear DTR and RTS
14. Check this caused an interrupt
15. Check correct entry was made in transmit completion FIFO
16. Set DTR
17. Check this caused an interrupt
18. Check correct entry was made in transmit completion FIFO
19. Clear DTR and set RTS
20. Check this caused an interrupt
21. Check correct entry was made in transmit completion FIFO
22. Set DTR and RTS
23. Check this caused an interrupt
24. Check correct entry was made in transmit completion FIFO
25. Set USE.CTS bit
26. Set modem state for no transmit
27. Set of a transmit
28. check it has not sent i.e. transmit is inhibited
29. Change state for transmit
30. Check it has transmitted
31. Select next line, if valid 2
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Modem signal error on line under test
ERROR 4: Modem signal error on line under test
ERROR 5: Modem signal error on line under test
ERROR 6: Modem signal error on line under test
ERROR 7: Changing a modem signal affected one on another line
ERROR 8: Changing a modem signal affected one on another line
ERROR 9: Modem signal error on line under test
ERROR 10: Modem signal error on line under test
ERROR 11: Changing a modem signal affected one on another line
ERROR 12: Changing a modem signal affected one on another line
ERROR 13: Modem signal error on line under test
ERROR 14: Modem signal error on line under test
ERROR 15: Changing a modem signal affected one on another line
ERROR 16: Changing a modem signal affected one on another line
ERROR 17: Clearing RTS and DTR did not cause interrupt
ERROR 18: Modem signal error on line under test
ERROR 19: Setting DTR did not cause an interrupt
ERROR 20: Modem signal error
ERROR 21: Setting RTS and clearing DTR did not cause an interrupt
ERROR 22: Modem signal error
ERROR 23: Setting DTR and RTS did not cause an interrupt
ERROR 24: Modem signal error
ERROR 25: Setting CTS and USE.CTS did not hold off a transmit
ERROR 26: Setting CTS and USE.CTS did not hold off a receive
ERROR 27: After setting CTS the transmit did not happen
ERROR 28: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For errors from 3 to 16, check the error report and see if the
current line is the same as the line that the modem signal was
set on.
4. With this information you should be able to tell if the error
was a stuck bit or a short between ports. Check cables and
loopbacks. If that does not fix it, swap the module.
5. For the rest of the errors, if none of the 3 to 16 have occurred
then the cables and loopbacks are working but the FIFO or interrupts
are not, swap the module.
6. NOTE this test will not run with a modem fitted to the line.
- Test_16
TITLE : Port reset ASYNC
Verifies that the Async port reset works.
- STEPS
1. Select line 0
2. Set line for non default conditions
3. Start a DMA
4. Select next line, if valid 2
5. Set Async port reset
6. Wait for 100 msecs
7. Check that the reset bit is clear
8. Select line 0
9. Check that the DMA's have stopped
10. Check the LPR register is at default settings
11. Select next line, if valid 9
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: ASYNC.RESET did not clear in under 100 msecs
ERROR 4: TX DMA still running after the async port has been reset
ERROR 5: The LPR has not gone to it's default condition
ERROR 6: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For all other errors, swap module
- Test_17
TITLE : TX completion FIFO SYNC
Verifies that the sync port TX completion FIFO works.
- STEPS
1. Set a counter to zero
2. Set Sync port to default conditions
3. Set for internal loop
4. Set up DMA buffers and pointers for double buffers
5. Disable interrupts
6. Start RX and TX DMA's
7. Wait for completion, with watch dog timer
8. Increment counter and if less than 8 then goto 4
9. Read transmit completion FIFO
10. Verify entry is a TX with no errors
11. Write to FIFO to pop it
11. Read transmit completion FIFO
12. Verify entry is an RX with no errors
13. Write to FIFO to pop it
14. If more entries then and counter is less than 100 goto 10
15. Verify correct number of entries
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: SYNC FIFO entry has an error condition
ERROR 4: Too many SYNC FIFO entries, FIFO error
ERROR 5: Incorrect number of SYNC FIFO entries
ERROR 6: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For all other errors, swap module
- Test_18
TITLE : DMA start and abort SYNC
Verify that the Sync port can start and abort a DMA transfer.
- STEPS
1. Disable interrupts
2. Set Sync port to internal loopback
3. Start a DMA receive
4. Start a DMA transmit
5. Abort transmit after 100 msecs
6. Verify that DMA aborted properly
7. Verify that there are VALID characters in the receive buffer
8. Start a DMA receive
9. Start a DMA transmit
10. Allow time for it to complete
11. Verify that it completes
12. Verify received data is correct
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: SYNC Transmit has not finished after being aborted
ERROR 4: SYNC Transmit DMA does not have the correct error code,
i.e. abort
ERROR 5: Receive DMA has not completed
ERROR 6: Receive DMA does not have correct code, i.e. abort
character received
ERROR 7: No Entries in SYNC FIFO, if no previous errors this is a
FIFO error
ERROR 8: SYNC FIFO entry is not a TX complete
ERROR 9: Buffer number in FIFO entry is not correct
ERROR 10: FIFO Entry has error bits set
ERROR 11: No Receive entry in FIFO
ERROR 12: FIFO entry is not a receive complete
ERROR 13: Buffer number in FIFO entry is incorrect
ERROR 14: Error code in FIFO entry is not abort by host
ERROR 15: Error from VDS call to SETIMR, this should never occur
ERROR 16: DMA Did not complete within 10 seconds in internal loop
ERROR 17: Transmit DMA did not complete, in internal loop
ERROR 18: Transmit DMA completed with errors
ERROR 19: Receive DMA did not complete
ERROR 20: Receive DMA completed with errors in internal loop
ERROR 21: SYNC FIFO has no entries
ERROR 22: FIFO Entry was not a transmit completion
ERROR 23: Buffer number in FIFO entry is not correct
ERROR 24: SYNC FIFO entry has error bits set
ERROR 25: No receive entry in SYNC FIFO
ERROR 26: SYNC FIFO entry was not a receive complete
ERROR 27: Buffer number in FIFO entry is not correct
ERROR 28: SYNC FIFO entry had error bits set
ERROR 29: Data compare error, RX buffer not the same as TX buffer
ERROR 30: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For all other errors, swap module, since this test runs in
internal loop.
- Test_19
TITLE : Maintenance mode test SYNC
This test verifies that the Maintenance modes are working correctly.
- STEPS
1. Set port to internal loop
2. Set up DMA receive
3. Set up DMA transmit
4. Start up DMA's
5. Wait for completion
6. Verify DMA's completed properly and received data is correct
7. If internal testing has been selected the end test
8. Set port to normal
9. Check port is set to normal
10. Set up DMA receive
11. Set up DMA transmit
12. Start up DMA's
13. Wait for completion
14. Verify DMA's completed properly and received data is correct
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error from call to VDS to SETIMR, this should never occur
ERROR 4: DMA Timed out after 10 seconds, in internal loop
ERROR 5: No Entries in the SYNC FIFO
ERROR 6: SYNC FIFO entry has error bits set
ERROR 7: No receive entry in SYNC FIFO
ERROR 8: Receive SYNC FIFO entry has error bits set
ERROR 9: Data error, RX buffer was not the same as the TX buffer
ERROR 10: Error from call to VDS to SETIMR, this should never occur
ERROR 11: DMA Timed out after 10 seconds in external loop
ERROR 12: No entries in the SYNC FIFO
ERROR 13: SYNC FIFO entry has error bits set
ERROR 14: No receive SYNC FIFO entry
ERROR 15: receive SYNC FIFO entry has error bits set
ERROR 16: Data error, RX buffer was not the same as the TX buffer
ERROR 17: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For errors 3 and 10, check rev of VDS
4. For errors from 4 to 9, these are internal loop errors so swap
module
5. For other errors from 11 to 16, these are external loop so
check cables and loopback.
6. Error 17 is a FATAL error, swap module
- Test_20
TITLE : Interrupts SYNC
Verify the Sync port's ability to generate Sync interrupts.
- STEPS
1. Disable Sync interrupts
2. Select internal loop
3. Set up a DMA receive
4. Set up a DMA transmit
5. Start off DMA's
6. Wait for transfer to complete
7. Check no interrupts occurred
8. Enable transmit interrupts
9. Set up a DMA receive
10. Set up a DMA transfer
11. Start off DMA's
12. Wait for transfer to complete
13. Check only transmit interrupts occurred
14. Enable transmit and receive interrupts
15. Set up a DMA receive
16. Set up a DMA transfer
17. Start off DMA's
18. Wait for transfer to complete
19. Check transmit and receive interrupts occurred
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error from call to VDS to SETIMR, this should never occur
ERROR 4: DMA Timed out after 10 seconds, in internal loop
ERROR 5: Interrupt generated with SYNC interrupts disabled
ERROR 6: Error from call to VDS to SETIMR, this should never occur
ERROR 7: DMA Timed out after 10 seconds, in internal loop
ERROR 8: No interrupts generated with SYNC interrupts enabled
ERROR 9: Interrupt was not a SYNC TX one, i.e. no TX entry in FIFO
ERROR 10: Interrupt was not a SYNC RX one, i.e. no RX entry in FIFO
ERROR 11: Unexpected interrupt generated by DMB32
ERROR 12: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For errors 3 and 6, check rev of VDS
4. Other errors, since this test runs in internal loop, swap module
- Test_21
TITLE : Line protocol SYNC
This test verifies that the sync line can work in all protocols.
- STEPS
1. Enable interrupts
2. Set pointer to base of param table
3. Get parameters
4. Set up SYNC port from table, if external testing then set no
internal loop, else set to internal
5. Set up DMA transfer
6. Start DMA transfer
7. Wait for interrupts with watch dog timer
8. Compare transmit and receive buffers
9. Inc param pointer if valid 3
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error from call to VDS to SETIMR, this should never occur
ERROR 4: DMA Timed out after 30 seconds
ERROR 5: Transmit DMA did not complete in 30 seconds
ERROR 6: Transmit DMA completed with errors
ERROR 7: Receive DMA did not complete
ERROR 8: Receive DMA completed with errors
ERROR 9: Data compare error, RX buffer not the same as TX buffer
ERROR 10: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. If running in external and previous tests have passed, try internal
4. If running in internal, swap module.
5. If you have a modem fitted, and answer the loopback type question
with MODEM, this test will run in internal loop. If you answered
LOOPBACK the test may fail since it runs DDCMP and the modem may be
too fast for DDCMP
- Test_22
TITLE : Line Parameters SYNC
This test goes through each of the sync parameters and verifies
that they work. This includes number of bits, type of data and sync
characters.
- STEPS
1. Enable interrupts
2. Set pointer to base of param table
3. Get parameters
4. Set up line
5. Set up DMA transfer
6. Start DMA transfer
7. Wait for interrupts with watch dog timer
8. Compare transmit and receive buffers
9. Inc param pointer if valid 3
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error from call to VDS to SETIMR, this should never occur
ERROR 4: DMA Timed out after 30 seconds
ERROR 5: Transmit DMA did not complete in 30 seconds
ERROR 6: Transmit DMA completed with errors
ERROR 7: Receive DMA did not complete
ERROR 8: Receive DMA completed with errors
ERROR 9: Data compare error, RX buffer not the same as TX buffer
ERROR 10: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. If running in external and previous tests have passed, try internal
4. If running in internal, swap module.
5. If you have a modem fitted, and answer the loopback type question
with MODEM, this test will run in internal loop. If you answered
LOOPBACK the test may fail, if not it will be meaningless
- Test_23
TITLE : Modem Signals SYNC
This test verifies that the modem signals work for the Sync line.
- STEPS
1. Disable interrupts
2. Set counter to table length (based on loop back type)
3. Set pointer to table (based on loop back type)
4. Set up modem signals from table
5. Wait for them to settle
6. Check incoming modem signals against table
7. Check that no interrupts occurred
8. Check the FIFO entry
9. Decrement counter, if not zero goto 4
10. Enable interrupts and interrupt on modem change
11. Set counter to table length (based on loop back type)
12. Set pointer to table (based on loop back type)
13. Set up modem signals from table
14. Wait for them to settle
15. Check that an interrupt occurred
16. Decrement counter, if not zero goto 13
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Unknown or unsupported adapter cable/loopback
ERROR 4: Modem signal error
ERROR 5: Modem signal error with staggered loopback
ERROR 6: Unexpected interrupt generated, with SYNC interrupts disabled
ERROR 7: Modem signal change did not cause a FIFO entry
ERROR 8: FIFO entry not due to modem change
ERROR 9: FIFO entry modem status not correct
ERROR 10: Modem signal error
ERROR 11: Modem signal error in staggered loopback
ERROR 12: Modem change did not cause an interrupt, with SYNC
interrupts enabled
ERROR 13: Interrupt not caused by modem signal change
ERROR 14: Un expected interrupt generated by DMB32
ERROR 15: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For error 3, if the cable is supported then the DMB32 is reporting
the cable type incorrectly, check ribbon cables, if OK swap module
4. For errors from 4 and 5, use the data provided in the error report
to check the cable and loopback.
5. For all other errors, if 4 or 5 have not occurred, swap the module
- Test_24
TITLE : Port reset SYNC
Verifies that the Sync port reset works.
- STEPS
1. Set line for non default conditions
2. Start a DMA transmit
3. Set Sync port reset
4. Check Sync CSR for default settings
5. Check transmit completion FIFO is empty
6. Check all registers for default settings
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Line reset bit did not clear after 100 msecs
ERROR 4: LPR1 did not reset to default after SYNC line reset
ERROR 5: LPR2 did not reset to default after SYNC line reset
ERROR 6: SYNC line reset did not stop the DMA
ERROR 7: SYNC reset bit did not clear after 100 msecs
ERROR 8: LPR1 did not reset to default after SYNC port reset
ERROR 9: LPR2 did not reset to default after SYNC port reset
ERROR 10: SYNC port reset did not stop the DMA
ERROR 11: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. For all other errors, swap the module
- Test_25
TITLE : DMA start and abort PRINTER
Verify that the Printer port can start and abort a DMA transfer.
- STEPS
1. Disable any formatting
2. Disable interrupts
3. Set up DMA
4. Start DMA
5. Wait 10 msecs
6. Abort DMA
7. Check DMA stopped
8. Check no interrupt occurred
10. Set up DMA
11. Start DMA
12. Wait for DMA to complete, with 10 sec timeout
13. Abort DMA
14. Check DMA stopped
15. Check no interrupt occurred
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Printer not on line or not connected
ERROR 4: DMA did not stop after being aborted
ERROR 5: Error codes not set up to abort by host
ERROR 6: Spurious interrupt with printer interrupts disabled
ERROR 7: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 8: DMA did not complete after ten seconds
ERROR 9: DMA completed with errors
ERROR 10: Unexpected interrupt occurred with printer interrupts
disabled
ERROR 11: BIIC Error occurred during test
- DEBUG
1. Examine the BUSERR register for error information
2. Run test 4
3. Check printer on/off line and connection. If OK swap module
4. Swap module
5. Swap module
6. Swap module
7. Should never occur, check rev of VDS
8. Check printer is fitted properly and inspect printout
9. Check printer for on/off line
10. Swap module
11. Check BUSERR register, Swap module
- Test_26
TITLE : Interrupts PRINTER
Verify the Printer port's ability to generate Printer interrupts.
- STEPS
1. Disable printer interrupts
2. Set up a DMA transfer
3. Start off DMA's
4. Wait for transfer to complete
5. Check no interrupts occurred
6. Enable printer interrupts
7. Set up a DMA transfer
8. Start off DMA's
9. Wait for transfer to complete
10. Check only printer interrupt occurred
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Printer not on line or not connected
ERROR 4: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 5: DMA did not complete after ten seconds
ERROR 6: DMA completed with errors
ERROR 7: Unexpected interrupt occurred with printer interrupts
disabled
ERROR 8: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 9: DMA did not complete after ten seconds
ERROR 10: DMA completed with errors
ERROR 11: Interrupt did not occur with printer interrupts enabled
ERROR 12: Interrupt was not from the printer port
ERROR 13: Unexpected interrupt occurred, not from printer port
ERROR 14: BIIC Error occurred during test
- DEBUG
1. Examine the BUSERR register for error information
2. Run test 4
3. Check that printer is fitted and on line, run manual section
4. Should never occur, Check rev of VDS
5. Check printer paper and print out
6. Check printer paper and print out
7. Swap module
8. Should never occur, Check rev of VDS
9. Check printer paper and print out
10. Check printer paper and print out
11. Swap module
12. Swap module
13. Swap module
14. Check BUSERR register, Swap module
- Test_27
TITLE : All Characters PRINTER
This test prints all possible characters with no formatting, and
verifies that the character count is correct. This requires visual
inspection of the print out.
- STEPS
1. Check printer fitted, if not exit
2. Build print buffer
3. Set up DMA
4. Start it off
5. Wait for completion with watch dog timer
6. Check completed properly
7. Check character count register
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Printer not on line or not connected
ERROR 4: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 5: DMA did not complete after ten seconds
ERROR 6: The DMB32's printed character count is not correct
ERROR 7: BIIC Error occurred during test
- DEBUG
1. Examine the BUSERR register for error information
2. Run test 4
3. Check that printer is fitted and on line, run manual section
4. Should never occur, Check rev of VDS
5. Check printer fitted
6. Check printout, swap module
7. Check BUSERR register, Swap module
- Test_28
TITLE : Port Formatting PRINTER
This test enables all formatting and prints a test message suitable
to exercise all the format functions. By checking the character count
a test can be made on this, however a visual inspection is required to
verify that the correct characters have been printed. The test will
first print ( with no formatting ) a duplicate of the expected output
to aid the inspection.
- STEPS
1. Check printer fitted, if not exit
2. Set pointer to base of param table
3. Format buffer with $FAO
4. Set formatting from parameter table
5. Set up DMA for test string
6. Start it of
7. Wait for completion with watch dog timer
8. Check completed properly
9. Check character count register against table value
10. Increment pointer and if valid goto 4
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error returned by VDS from call to $FAO, should never occur
ERROR 4: Printer not on line or not connected
ERROR 5: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 6: DMA did not complete after ten seconds
ERROR 7: The DMB32's printed character count is not correct
ERROR 8: BIIC Error occurred during test
- DEBUG
1. Examine the BUSERR register for error information
2. Run test 4
3. Should never occur, Check rev of VDS
4. Check printer fitted and on line. Run manual section test
5. Should never occur, Check rev of VDS
6. Swap module
7. Swap module
8. Check BUSERR register, Swap module
- Test_29
TITLE : Prefix and Suffix characters PRINTER
Print various types and numbers of prefix and suffix characters. By
checking the character count a test can be made on this, however a
visual inspection is required to verify that the correct characters
have been printed. The test will first print ( with no formatting ) a
duplicate of the expected output to aid the inspection.
- STEPS
1. Check printer fitted, if not exit
2. Check printer on line
3. Set pointer to base of param table
4. Set no formatting or prefix / suffix chars
5. Set up DMA for inspection string
6. Start it of
7. Wait for completion with watch dog timer
8. Check completed properly
9. Check interrupted properly
10. Set up test suffix and prefix chars from param table
11. Set prefix / suffix chars on
12. Set up DMA for test string
13. Start it of
14. Wait for completion with watch dog timer
15. Check completed properly
16. Check interrupted properly
17. Check character counter against table value
18. Increment pointer and if valid goto 4
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error returned by VDS from call to $FAO, should never occur
ERROR 4: Printer not on line or not connected
ERROR 5: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 6: DMA did not complete after ten seconds
ERROR 7: The DMB32's printed character count is not correct
ERROR 8: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. Should never occur, Check rev of VDS
4. Check printer fitted and on line. Run manual section test
5. Should never occur, Check rev of VDS
6. Swap module
7. Swap module
8. Check BUSERR register, Swap module
- Test_30
TITLE : Width And Size PRINTER
This test will print a block of data at various page sizes for
visual inspection.
- STEPS
1. Check printer fitted, if not exit
2. Check printer on line
3. Set pointer to base of param table
4. Set no formatting or prefix / suffix chars
5. Set up DMA for inspection string
6. Start it of
7. Wait for completion with watch dog timer
8. Check completed properly
9. Check interrupted properly
10. Set up test page length and width from param table
11. Set up DMA for test string
12. Start it of
13. Wait for completion with watch dog timer
14. Check completed properly
15. Check interrupted properly
16. Check character count against table value
17. Increment pointer and if valid goto 4
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error returned by VDS from call to $FAO, should never occur
ERROR 4: Printer not on line or not connected
ERROR 5: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 6: DMA did not complete after ten seconds
ERROR 7: The DMB32's printed character count is not correct
ERROR 8: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. Should never occur, Check rev of VDS
4. Check printer fitted and on line. Run manual section test
5. Should never occur, Check rev of VDS
6. Swap module
7. Swap module
8. Check BUSERR register, Swap module
- Test_31
TITLE : Test patterns PRINTER
This test prints the pattern called up by the start up questions on
the line printer and verifies that the character count is correct.
This requires visual inspection of the print out. If the repeat number
was set to CONT this test will run until aborted by a control C, this
feature should be used with care since it may "hang" the diagnostic.
- STEPS
1. Check printer fitted, if not exit
2. Check printer on line
3. Set no formatting or prefix / suffix chars
4. Set up DMA for test string built in init routine from questions
5. Start it of
6. Wait for completion with watch dog timer
7. Check completed properly
8. Check interrupted properly
9. Check character counter against table value
10. Increment counter and compare to loop number if less goto 4
11. If cont flag set goto 4
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Printer not on line or not connected
ERROR 4: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 5: DMA did not complete after ten seconds
ERROR 6: The DMB32's printed character count is not correct
ERROR 7: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. Check printer fitted and on line. Run manual section test
4. Should never occur, Check rev of VDS
5. Swap module
6. Swap module
7. Check BUSERR register, Swap module
- Test_32
TITLE : Exercise Test ASYNC SYNC PRINTER
This test will set up all async lines, the sync line and the
printer for full DMA TX and RX and fire them off as fast as possible.
The received data will then be verified. The four modes of DMA will be
used simultaneously by setting two Async lines for each mode, one each
for the four Sync buffers and one after another for the printer. The
printer buffer will be small enough to enable four prints while the
others are running. This test will use some large buffers.
- STEPS
1. Check if any ports selected, if none then exit
2. Set count to 0
3. Check Async port to be tested, if not 9
4. Select line 0
5. Set up line
6. Set up DMA pointers from table built by init code
7. Select next line, if all lines not set 5
8. Check if Sync port to be tested, if not 12
9. Set interrupt enables
10. Set up port
11. Set up DMA, both buffers, from table built by init code
12. Check if Printer port to be tested, if not 15
13. Set up port
14. Set up DMA, type dependent on count, from table built by init code
15. Check Async port to be tested, if not 19
16. Select line 0
17. Start DMA
18. Select next line, if valid 17
19. Check if Sync port to be tested, if not 21
20. Start DMA
21. Check if Printer port to be tested, if not 23
22. Start it off
23. Wait for completion of all lines and ports
24. Compare all transmit buffers with appropriate receive buffers
25. Inc count, if valid 2
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: Error returned by VDS from call to SETIMR, this should
never occur
ERROR 4: DMB32 did not complete all the DMA's after thirty seconds
ERROR 5: The DMB32's printed character count is not correct
ERROR 6: Did not get the correct number of SYNC FIFO entries
ERROR 7: Data compare error, SYNC RX data not the same as TX data
ERROR 8: ASYNC Line did not receive the correct number of characters
ERROR 9: Received character compare error or errors on character
ERROR 10: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. This error should never occur, check rev of VDS
4. For other errors, run previous tests and vary setup to try
to establish the problem area. If test fails in internal loop
swap module
6. For error 8, the Expected data is composed of two bytes, the low
byte is the data and the high byte are the error bits, taken from
the SBUF register, refer to the DMB32 Users guide for details.
- Test_33
TITLE : ON / OFF Line Detection PRINTER
This test requires manual intervention. The user will be prompted
to turn the printer off line, having done so the diagnostic will check
the PR.OFFLINE bit in the PCSR.
- STEPS
1. Check printer fitted, if not exit
2. Check on/off line state and store it if off line then goto 4
3. Ask for printer to be put on and then off line then goto 5
4. Ask for printer to be put off and then on line
5. pole on/off line bit until it changes
6. report change
7. pole on/off line bit until it changes
8. report change
- ERRORS
ERROR 1: Error from $DS_CHANNEL call used to enable interrupts
ERROR 2: Error initialising DMB32, selftest timed out or failed
ERROR 3: BIIC Error occurred during test
- DEBUG
1. May be errors in BUSERR reg
2. Run test 4 for analysis of selftest errors
3. Check BUSERR register, Swap module