- HELP
EVCDC, a REPAIR level (Level 3) diagnostic, contains a test
which will establish the functionality of the IEU11-A Dual IEC/IEEE
Bus Controller. The program provides error messages which identify data
and I/O errors. The program runs with the Diagnostic Supervisor in
standalone mode.
- DEVICE
Devices supported by this program (EVCDC) are:
IEU11-A
- IEU11A
Description: IEU11-A Dual IEC/IEEE Bus Controller
link: DWn
Generic name: IXa
Additional information:
UNIBUS Base [octal 760000-777760]
UNIBUS vector [octal 0-774]
UNIBUS BR level [decimal 4-7]
Tested by: EVCDB, EVCDC
- EVENT
Legal event flags are:
Speed Flags: Used for long or noisy IEEE-488 cables.
4 Disable Very Short T1 Time Delay Mode
5 Disable Short T1 Time Delay Mode
Partial Test Flags: Used to limit tests to the failing unit.
6 Test Only Register Set 0 as Controller-in-charge
7 Test Only Register Set 1 as Controller-in-charge
Dump Flags: Used for diagnostic debugging and error tracing.
8 Print a register dump after each register operation
9 Display each register operation
10 Display each register check
- QUICK
The QUICK flag will reduce the number of loops for each test and will
reduce the execution time of the three longest tests: The Primary
Address Uniqueness Test, the Match Transfer Termination Test, and
The DMA Large Buffer Transfer Test.
- MANUAL
This test requires no manual intervention.
- SUMMARY
This test has no special summary report.
- ATTACH
Example command strings to LOAD, ATTACH and SELECT the IEU11-A with
a base address of 764100 a base vector of 400 and a BR level of 6:
LOAD EVCDC.EXE
ATTACH appropriate Unibus Adapter to main processor bus
ATTACH IEU11A DW0 IXA 764100 400 6
SELECT ALL
- REQUIREMENTS
HARDWARE:
IEU11-A
BC08S-01 test cable.
SOFTWARE:
VAX Diagnostic Supervisor (minimum, Version 6.11)
EVCDC.EXE Diagnostic
- SECTIONS
The following sections are contained in this program (EVCDC):
DEFAULT All tests
REGISTER Register Addressing Tests
IEEE IEEE-488 Tests
DMA DMA Transfer Tests
- DEFAULT
DEFAULT TEST SECTION
All tests are contained in the default test section.
- REGISTER
REGISTER TEST SECTION
The REGISTER section tests each unit on the IEU11-A board for
basic register addressing functions, including the existence of the
registers on the UNIBUS, the readability/writeability of the
registers, and the effect of Master Clear.
- IEEE
IEEE TEST SECTION
The IEEE section is a functional test of the IEEE-488 standard as
described by the state diagrams in that standard. The tests in these
sections exercise nearly every state transition for the primary
IEEE-488 bus functions:
1. Acceptor Handshake
2. Source Handshake
3. Listener and Extended Listener
4. Talker and Extended Talker
5. Service Request
6. Remote/Local
7. Parallel Poll
8. Controller-in-Charge
9. System Controller
- DMA
DMA TEST SECTION
The DMA sections exercises the Direct Memory Access capabilities
of the IEU11-A. The DMA DATA TRANSFER TEST exercises only one of the
two units at a time in order to facilitate fault isolation. The EOI
and MATCH termination tests exercise optional ways of ending a DMA
transfer. Finally, the LARGE BUFFER test checks every byte in UNIBUS
space and the NON-EXISTENT memory tests checks for the absence of
UNIBUS mapping.